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Technology

FinFET and Gate-All-Around Transistors for Sub-3nm Process Nodes

Quick fact

In a 2023 GAA transistor, the gate covers the channel on all four sides, while in a FinFET it only covers three. This extra control is what allows chips to keep shrinking past 3 nanometers.

Why this is interesting

Your smartphone's processor is built with billions of tiny switches. But as these switches shrink to just a few atoms wide, how do engineers keep them from leaking electricity and failing?

Read the full explanation

Understanding FinFET and Gate-All-Around Transistors for Sub-3nm Process Nodes

Imagine a water pipe controlled by a valve. The valve (the gate) controls the flow of water (the electric current). In older, planar transistors, the valve could only press down on the pipe from the top. As the pipe got thinner, the valve couldn't fully shut off the flow — water would leak even when it was supposed to be off. To solve this, engineers raised the pipe up so the valve could wrap around three sides, creating a 'fin' shape — that's a FinFET. For the next step, they went even further: they made the pipe float and wrapped the valve completely around all sides, creating a Gate-All-Around transistor. This gives the valve total control, stopping leaks and making the switch more efficient.

A deeper explanation

The gate in a transistor controls the flow of current by creating an electric field that either attracts or repels charge carriers in the channel. With a planar transistor, the gate's influence is limited because it only touches the top of the channel. When the channel length shrinks to sub-3nm, the drain's electric field can interfere with the gate's control, causing unwanted current leakage and reduced efficiency — known as short-channel effects. FinFETs improve this by wrapping the gate around three sides of the channel, creating a 'fin' with a larger surface area and better electrostatic control. Gate-All-Around (GAA) takes this further by using a channel made of stacked nanosheets, and the gate wraps completely around each sheet. This 'surrounding' design minimizes leakage, improves current flow, and reduces power consumption, allowing devices to continue scaling down to 3nm and beyond. This is why all major chipmakers are moving to GAA technology for their most advanced processes.

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